EP1SGX25DF1020C5ES vs EP1SGX25DF1020C6ESL 比較

詳細並排比較 EP1SGX25DF1020C5ES 由 Altera 與 EP1SGX25DF1020C6ESL 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1SGX25DF1020C5ES EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera

EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera

EP1SGX25DF1020C5ES ⚠ 最後購買機會

規格比較

參數 EP1SGX25DF1020C5ES EP1SGX25DF1020C6ESL
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Device Family Stratix GX —
Logic Family CMOS —
Logic Elements (LEs) 25,660 —
Configurable Logic Blocks (CLBs) 2,566 —
Embedded Memory 1,944,576 bits —
Process Technology 130 nm —
Core Supply Voltage 1.5 V —
Package Type FBGA-1020 (FineLine BGA) —
Package Dimensions 33 x 33 mm —
Ball Pitch 1.00 mm —
Lead-Free Yes —
工作溫度 0 °C to 85 °C (commercial) —
Speed Grade C5 C6
Part Variant Suffix ES (Engineering Sample) —
Configuration Interface JTAG (IEEE 1149.1) / Passive Serial —
Family — Stratix GX
Logic Elements — 25,660
Total RAM Bits — 1,944,576 bits
User I/O Pins — 607
LABs/CLBs — 2,566
封裝 — 1020-BBGA (FineLine BGA)
Core Voltage — 1.5 V
工作接面溫度 — 0 C to 85 C
安裝類型 — Surface Mount
RoHS 狀態 — [DATA_NEEDED: RoHS status]
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG
Process Node — 0.13 um CMOS
Transceivers — Embedded multi-gigabit transceivers (per Stratix GX family)
DSP Blocks — Yes (embedded DSP blocks)
I/O Standards Supported — LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family)

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