EP20K100CQ240C8 vs EP20K100CQ240C8ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K100CQ240C8 disebabkan oleh Intel dan EP20K100CQ240C8ES disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Intel
EP20K100CQ240C8ES EP20K100CQ240C8ES - 189-I/O 240QFP FPGA | Intel

EP20K100CQ240C8ES - 189-I/O 240QFP FPGA | Intel

EP20K100CQ240C8ES Obsolete

Pengandingan Spesifikasi

Parametr EP20K100CQ240C8 EP20K100CQ240C8ES
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20K —
Series EP20K100 —
Typical Gates 100,000 —
Maximum System Gates 263,000 —
Logic Elements 4,160 —
Embedded Memory (ESB) 53,248 bits —
User I/O Pins 189 —
Kemasan 240-pin PQFP (QFP) —
Speed Grade C8 (commercial, -8) —
Suhu Operasi 0C to +85C (commercial) —
Core Voltage 2.5 V —
I/O Standards LVTTL, LVCMOS, PCI —
Configuration Interface JTAG (IEEE 1149.1), serial/parallel —
Status RoHS [DATA_NEEDED: RoHS status] Unknown - not confirmed in scraped listing
Programming Method SRAM-based, in-system programmable —
Device Type — FPGA (Field Programmable Gate Array)
Product Family — Intel/Altera EP20K series FPGA family
Number of Logic Elements / Cells — 4,160
Total RAM Bits — 53,248 bits
Number of User I/O — 189
Kemasan / Case — 240-BFQFP / QFP-240
Package Type — Quad Flat Package
Packaging — Tray
Jenis Pemasangan — Surface Mount
Ordering/ Speed Grade Suffix — C8ES
Stock Quantity — 4,816 pieces per Heisener listing
Lead Time — To Be Confirmed
Unit Price — Request a Quote
Minimum Operating Temperature — [DATA_NEEDED: minimum operating temperature]
Maximum Operating Temperature — [DATA_NEEDED: maximum operating temperature]
Core / I/O Supply Voltage — [DATA_NEEDED: VCCINT and VCCIO voltage]
Supported I/O Standards — [DATA_NEEDED: supported I/O standards]
Differential I/O Pairs — [DATA_NEEDED: number of differential I/O pairs]
Configuration Schemes — [DATA_NEEDED: supported configuration schemes]

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