EP20K200CF672C8ES vs EP20K400CF672C8ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K200CF672C8ES disebabkan oleh Intel dan EP20K400CF672C8ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K200CF672C8ES EP20K400CF672C8ES
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20K APEX 20KC
Maximum Logic Elements 8,320 —
Typical Gates 200,000 system gates —
Maximum User I/O Pins 1,064 —
Embedded RAM Bits 212,992 bits —
Kemasan 672-ball FineLine BGA 672-BGA FineLine (FC-FBGA / S-PBGA-B672)
Speed Grade C8 (8 ns pin-to-pin) —
Suhu Operasi 0C to +85C (commercial) 0°C to 85°C (Commercial)
Core Voltage 1.8 V —
Configuration Method SRAM, requires external PROM —
Process Technology [DATA_NEEDED: process node] 0.15 µm CMOS
Jenis Pemasangan Surface Mount (BGA) —
Status RoHS [DATA_NEEDED: rohs status] [DATA_NEEDED: not stated in verified data]
Status Suffix ES (Engineering Sample) —
I/O Standards LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL —
Logic Element Architecture 4-input LUT with dedicated carry/cascade —
Embedded Memory Type RAM / ROM / CAM blocks —
Series — EP20K400
Logic Cells / Macros — 16,640
System Gates (typical) — 400,000
System Gates (maximum) — 212,992 [DATA_NEEDED: confirm datasheet interpretation]
Maximum User I/O — 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value]
Bidirectional I/O — 484
Propagation Delay — 2.5 ns
Maximum Internal Frequency — 301.21 MHz
Nominal Supply Voltage — 1.8 V
Supply Voltage Range — 1.71 V to 1.89 V
Logic Family — CMOS
Architecture — MultiCore™ (LUT + Embedded System Block)
Programming Method — JTAG / in-system via configuration memory

Laporan Datasheet & Sumber

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