EP20K30EFC144-1N vs EP20K60EFC144-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K30EFC144-1N disebabkan oleh Intel dan EP20K60EFC144-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Intel
EP20K30EFC144-1N EP20K30EFC144-1N - APEX-20KE 30K Gates FPGA | Intel

EP20K30EFC144-1N - APEX-20KE 30K Gates FPGA | Intel

EP20K30EFC144-1N Obsolete

Pengandingan Spesifikasi

Parametr EP20K30EFC144-1N EP20K60EFC144-2
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series APEX-20KE APEX-20K
Device Family APEX-20K MultiCore (LUT + Product-Term + ESB) —
Gates 30,000 —
Logic Elements 1,200 2,560
Embedded SRAM Bits 24,576 —
User I/Os 93 (per Mouser/Kynix listing); 408 (per alternate datasheet listing - see note) —
Package Type 144-pin FineLine BGA (FBGA) —
Internal Frequency (max) 160 MHz 160 MHz
Propagation Delay 1.68 ns 1.72 ns
Logic Family CMOS —
Core Technology 0.22 µm CMOS, SRAM-based configuration —
Supply Voltage (Core) 1.71 V to 1.89 V (1.8 V nominal) —
Suhu Operasi 0 °C to 85 °C (commercial, N suffix) 0 °C to +85 °C (commercial)
Configuration Interface IEEE 1149.1 JTAG + serial configuration (external EPCx required) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS Unknown - not stated in verified sources [DATA_NEEDED: RoHS status]
Family — APEX-20KE (Enhanced, 1.8 V core)
Typical Gates — 60,000
Total RAM Bits — 32,768
User I/O — 92 to 93
Core Supply Voltage — 1.71 V to 1.89 V
Process Technology — 0.18 µm CMOS
Kemasan — 144-LQFP (also referenced as 144-FBGA 13x13 in some sources)
JTAG Support — IEEE 1149.1 boundary scan
I/O Standards — LVTTL, LVCMOS, PCI, GTL+
Configuration Method — Serial/Parallel passive, JTAG, EPC companion

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga