EP20K400CF672C7ES vs EP20K400CF672C7N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400CF672C7ES disebabkan oleh Altera dan EP20K400CF672C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K400CF672C7ES EP20K400CF672C7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Series EP20K400 —
Device Type Loadable PLD / FPGA —
Logic Elements (Cells) 16,640 —
System Gates 400,000 —
Embedded Memory (Bits) 212,992 —
Total RAM Bits 212,992 —
Maximum User I/O 488 488
I/O Lines 484 —
Input Lines 488 —
Number of PLLs 4 —
Maximum Internal Clock Frequency 375.94 MHz —
Propagation Delay 1.4 ns 2.5 ns (catalog) / 1.48 ns (some catalog)
Process Technology 0.18 um CMOS 0.18-micron CMOS, all-layer copper interconnect
Core Voltage 1.8 V —
MultiVolt I/O 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Speed Grade C7 (commercial, -7) —
Suhu Operasi 0C to +85C (commercial) 0 C to 85 C (Commercial)
Package Type 672-ball FineLine BGA —
Package Code FC-FBGA-B672 —
Ball Pitch 1.000 mm —
Jenis Pemasangan Surface Mount Surface Mount (BGA)
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status not in provided data]
Maximum System Gates — 1,052,000
Typical Gates — 400,000
Logic Elements (LEs) — 16,640
Embedded Memory — 488 Kbits
User I/O (per catalog) — 480 / 502 (per source)
Kemasan — 672-ball FineLine BGA (FC-FBGA / BBGA)
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 3.3 V / 2.5 V banked
Maximum Frequency — 375.94 MHz (internal)
Aras MSL — 3 (per JEDEC J-STD-020)
Configuration Modes — PS, PPS, JTAG

Laporan Datasheet & Sumber

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