EP20K600CB652C8N vs EP20K600CB652C9N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CB652C8N disebabkan oleh Altera dan EP20K600CB652C9N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K600CB652C8N EP20K600CB652C9N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Device Type Loadable PLD / FPGA Loadable PLD (FPGA)
System Gates 600,000 —
Logic Elements 24,320 cells 24,320
Embedded Memory 311,296 bits —
User I/O Pins 488 —
Dedicated Inputs 4 —
Outputs 480 —
Propagation Delay (typ.) 1.48 ns —
Pin-to-Pin Timing 1.78 ns —
Internal Frequency (typ.) 301.21 MHz —
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) 1.8 V
Process Technology 0.18 µm all-layer copper-metal 0.15 micron all-layer copper CMOS
Speed Grade C8 C9 (~1.48 ns propagation delay)
Suhu Operasi 0 °C to 85 °C (commercial) 0 C to 85 C (commercial)
Kemasan 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
Jenis Pemasangan Surface Mount (BGA) Surface Mount (BGA)
Architecture MultiCore LUT + Embedded System Blocks (ESB) MultiCore LUT + embedded system memory (ESB)
Pin-Compatible With APEX 20KE family —
Status RoHS unknown [DATA_NEEDED: rohs status]
Typical Gates — 600,000
Maximum User I/O — 488
On-chip Memory — Embedded system memory blocks (dual-port RAM, FIFO)
Configuration Interface — JTAG (IEEE 1149.1) and serial/PROM configuration
Pin/Pin Compatibility — Pin-compatible with APEX 20KE devices of same package
Toolchain — Altera/Intel Quartus II (legacy APEX support)
Aras MSL — [DATA_NEEDED: MSL level]

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