EP20K60EFC144-1 vs EP20K60EFI144-2X Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K60EFC144-1 disebabkan oleh Altera dan EP20K60EFI144-2X disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K60EFC144-1 EP20K60EFI144-2X
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Device Family APEX 20KE APEX 20KE
Series APEX 20K —
Logic Family CMOS —
Typical Gates 60,000 60,000
Maximum System Gates 256,000 —
Macrocells 256 —
Maximum User I/Os 93 (per datasheet; 196 max in 144-FBGA family datasheet) —
Embedded Memory 32,768 bits (2560 RAM blocks) —
Maximum Internal Frequency 160 MHz —
Propagation Delay 1.72 ns —
Core Supply Voltage 1.8 V —
Speed Grade -1 -2 (industrial, -2X suffix)
Suhu Operasi 0 C to 85 C (Commercial) -40 °C to +85 °C
Kemasan 144-FBGA (Fine-pitch BGA) —
Package Pin Count 144 balls —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: rohs_status] [DATA_NEEDED: RoHS compliance status]
Programming Interface JTAG / ByteBlaster / Altera Programming Unit —
Logic Elements — 2,560
Maximum Operating Frequency — 200 MHz
Process Technology — 0.22 µm CMOS
Core Supply Voltage (VCCINT) — 1.8 V (range 1.71 V to 1.89 V)
Propagation Delay (tpd) — 2.41 ns
User I/O Pins — 93
Dedicated Inputs — 4
Total Terminals — 144
Package Type — FBGA-144 (FineLine BGA, LBGA)
Package Code — LBGA
Terminal Form — Ball
Architecture — MultiCore (LUT + product-term + embedded memory)
I/O Standard Support — LVDS, 1.8 V I/O
Configuration Interface — JTAG (IEEE 1149.1) / serial PROM / parallel PROM
Tingkat sensitiviti Air Nama (MSL) — 3

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