EP20K60EFI144-2X vs EP20K60EFC144-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K60EFI144-2X disebabkan oleh Altera dan EP20K60EFC144-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K60EFI144-2X EP20K60EFC144-2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Device Family APEX 20KE —
Typical Gates 60,000 60,000
Logic Elements 2,560 2,560
Maximum Operating Frequency 200 MHz —
Process Technology 0.22 µm CMOS 0.18 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V (range 1.71 V to 1.89 V) —
Propagation Delay (tpd) 2.41 ns —
User I/O Pins 93 —
Dedicated Inputs 4 —
Total Terminals 144 —
Package Type FBGA-144 (FineLine BGA, LBGA) —
Package Code LBGA —
Terminal Form Ball —
Architecture MultiCore (LUT + product-term + embedded memory) —
I/O Standard Support LVDS, 1.8 V I/O —
Speed Grade -2 (industrial, -2X suffix) —
Suhu Operasi -40 °C to +85 °C 0 °C to +85 °C (commercial)
Configuration Interface JTAG (IEEE 1149.1) / serial PROM / parallel PROM —
Tingkat sensitiviti Air Nama (MSL) 3 —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Series — APEX-20K
Family — APEX-20KE (Enhanced, 1.8 V core)
Total RAM Bits — 32,768
User I/O — 92 to 93
Core Supply Voltage — 1.71 V to 1.89 V
Internal Frequency (max) — 160 MHz
Propagation Delay — 1.72 ns
Kemasan — 144-LQFP (also referenced as 144-FBGA 13x13 in some sources)
JTAG Support — IEEE 1149.1 boundary scan
I/O Standards — LVTTL, LVCMOS, PCI, GTL+
Configuration Method — Serial/Parallel passive, JTAG, EPC companion

Laporan Datasheet & Sumber

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