EP2A15F672I8 vs EP2A15F672C9 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A15F672I8 disebabkan oleh Altera dan EP2A15F672C9 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP2A15F672I8 EP2A15F672I8 - APEX II 600K Gate FPGA, 672-FBGA | Altera

EP2A15F672I8 - APEX II 600K Gate FPGA, 672-FBGA | Altera

EP2A15F672I8 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP2A15F672I8 EP2A15F672C9
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Family APEX II —
Process Technology 0.15 µm all-layer copper CMOS 0.15 µm all-layer copper (up to 8 metal layers)
Metal Layers Up to 8 —
Typical Gates 600 K —
Logic Elements / Cells 16,640 —
User I/Os 492 —
Embedded Memory 416 Kbits ESB dual-port RAM / FIFO
Maximum Internal Frequency 435 MHz 379 MHz
Propagation Delay (typ.) 1.94 ns —
Core Supply Voltage 1.5 V (1.425 V – 1.575 V) 1.5 V
Supply Voltage Range 1.425 V to 1.575 V —
Suhu Operasi -40 °C to +100 °C (TJ, industrial) 0 °C to 85 °C (commercial)
Kemasan 672-FBGA, FCBGA, 27 x 27 mm, 1.0 mm pitch 672-ball FC-FBGA (27 x 27 mm, 1 mm pitch, FineLine)
Jenis Pemasangan Surface Mount (BGA) —
I/O Standards LVTTL, LVCMOS, LVDS, MultiVolt I/O —
Status RoHS [DATA_NEEDED: RoHS status] —
Logic Family — APEX II (CMOS)
Usable Gates — 600 K
Logic Elements — 16640
Macrocells — 1664
Maximum User I/Os — 492
I/O Supply Voltage — 3.3 V
Propagation Delay — 1.94 ns
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Configuration Interface — Passive serial / Active serial / JTAG (IEEE 1149.1)
PLLs — On-chip PLLs for clock synthesis and deskew
Compliance — RoHS - [DATA_NEEDED: status not in verified data]; IEEE 1149.1 boundary scan

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