EP2A25F672C7 vs EP2A25F672C7N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A25F672C7 disebabkan oleh Altera dan EP2A25F672C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A25F672C7 EP2A25F672C7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Product Family APEX II —
Logic Elements 25,000 24,320 cells
Maximum System Gates 1,650,000 —
Maximum RAM Bits 422,976 —
User I/O Count 492 —
Kemasan 672-ball FCBGA (FineLine BGA) —
Process Technology 0.15-um all-layer copper, up to 8 metal layers 0.15 µm all-layer copper (up to 8 metal layers)
Supply Voltage (Core) 1.5 V —
LVDS Data Rate 1 Gbps per channel (True-LVDS) —
I/O Standards Supported LVDS, LVPECL, PCML, HyperTransport —
Suhu Operasi 0C to +85C (Commercial) 0 °C to 85 °C (commercial)
Speed Grade -7 —
Configuration Mode Passive Serial, Passive Parallel, JTAG —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Embedded System Blocks (ESB) Yes - RAM, ROM, CAM, multiplier support —
Family — APEX II
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)
Embedded Memory — Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
PLLs — Up to 4
Jenis Pemasangan — Surface Mount

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