EP2A25F672ES vs EP2A25F672C7N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A25F672ES disebabkan oleh Altera dan EP2A25F672C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A25F672ES EP2A25F672C7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX II APEX II
Logic Elements 24,320 24,320 cells
Maximum Gates 900,000 —
Embedded System Blocks (ESBs) 24 —
Maximum Embedded RAM 1.4 Mbit —
Maximum User I/O Pins 492 —
Kemasan 672-ball FC-FBGA —
Process Technology 0.15 µm CMOS 0.15 µm all-layer copper (up to 8 metal layers)
Core Voltage 1.5 V —
Maximum System Clock Frequency 500 MHz —
Number of PLLs 4 —
I/O Banks 16 —
Supported I/O Standards LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL —
Configuration Mode Serial / Parallel / JTAG —
Gambaran Suhu Operasi [DATA_NEEDED: operating temperature range] —
Status RoHS Compliant [DATA_NEEDED: RoHS compliance]
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
Suhu Operasi — 0 °C to 85 °C (commercial)
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)
Embedded Memory — Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
PLLs — Up to 4
Jenis Pemasangan — Surface Mount

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