EP2A25F672I8 vs EP2A25F672I6 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A25F672I8 disebabkan oleh Altera dan EP2A25F672I6 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A25F672I8 EP2A25F672I6
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family APEX II APEX II
Logic Elements / Cells 24,320 —
Equivalent Gates 900,000 —
Embedded Memory (RAM bits) 622,592 —
User I/Os 492 —
Number of PLLs 4 —
Process Technology 0.15 µm CMOS, up to 8 metal layers 0.18 µm CMOS
Core Supply Voltage 1.5 V —
Propagation Delay 1.69 ns (typical) —
Internal Performance 333 MHz (per legacy datasheet) —
LVDS / High-Speed I/O Yes, up to 1 Gbps —
Kemasan 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch 672-ball FineLine BGA (FBGA-672)
Jenis Pemasangan Surface Mount (BGA) Surface Mount (BGA)
Suhu Operasi –40 °C to +85 °C (industrial, 'I' grade) —
Speed Grade I8 (industrial, 8-speed-grade per APEX II ordering scheme) 6
JTAG / Boundary Scan IEEE 1149.1 compliant —
I/O Standards Supported LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI —
Status RoHS unknown [DATA_NEEDED: RoHS compliance status]
Lead-Free Status unknown —
Logic Elements (typical gates) — 25,000
Fabric Architecture — SRAM-based LUT
Core Voltage — 1.5 V
Configuration Method — External SRAM configuration device (EPC series)
Temperature Grade — Industrial (-40 °C to +100 °C ambient)
Embedded Memory — Embedded System Blocks (ESB), dual-port RAM / CAM
DSP Blocks — MultiCore dedicated multipliers
Boundary Scan — JTAG (IEEE 1149.1) compliant
Clock Management — Dedicated PLL / clock tree circuitry
I/O Bank Count — [DATA_NEEDED: number of user I/O banks]
Lead-Free — [DATA_NEEDED: lead-free status]
Aras MSL — [DATA_NEEDED: moisture sensitivity level]

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