EP2A40F672C6N vs EP2A40F672C9 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A40F672C6N disebabkan oleh Intel dan EP2A40F672C9 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP2A40F672C6N | EP2A40F672C9 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 | — |
| Maximum System Gates | 1,125,000 | — |
| Embedded RAM Bits | 442,368 | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | — |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V | True-LVDS, LVPECL, PCML, HyperTransport |
| Kemasan | 672-ball FineLine BGA | 672-BBGA, FC-FBGA (FineLine) |
| Suhu Operasi | Commercial (0C to +85C) | 0 °C to 85 °C (commercial) |
| Speed Grade | C6 (per part number suffix) | — |
| Configuration Methods | Passive Serial, Passive Parallel, JTAG | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Process Technology | SRAM-based, 0.18 um (per family datasheet) | 0.15 µm all-layer copper, up to 8 metal layers |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Device Family | — | APEX II PLD |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Macros | — | 2,560 |
| User I/Os | — | 492 |
| Bilangan Pin | — | 672 |
| Package Size | — | 27 mm × 27 mm, 1 mm ball pitch |
| Logic Family | — | CMOS |
| Propagation Delay | — | 1.55 ns |
| Internal Speed Grade | — | 366 MHz |