EP2C5Q208C8 vs EP2C5Q208C7 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2C5Q208C8 disebabkan oleh Intel dan EP2C5Q208C7 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP2C5Q208C7 - Cyclone II FPGA, 142 I/O, 208QFP | Intel
EP2C5Q208C7 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP2C5Q208C8 | EP2C5Q208C7 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Masa Terakhir Dibeli |
| Family | Cyclone II | — |
| Logic Elements / Cells | 4608 | — |
| Total RAM Bits | 119808 bits | 119,808 bits |
| Number of User I/O | 142 | 142 |
| Kemasan | 208-BFQFP (PQFP) | — |
| Kiraan Pin | 208 | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Core Supply Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm | — |
| Speed Grade | C8 | — |
| Frekuensi Klock Maksimum | 402.58 MHz (per FPGAkey listing) | — |
| Operating Temperature Grade | [DATA_NEEDED: temperature range by suffix] | — |
| Status RoHS | RoHS non-compliant (per distributor data) | Unknown |
| Lead-Free Status | No (per distributor data) | — |
| Configuration Technology | [DATA_NEEDED: configuration memory type] | — |
| Embedded Multipliers | [DATA_NEEDED: number of 18x18 multipliers] | — |
| PLL Count | [DATA_NEEDED: number of PLLs] | — |
| I/O Standards Supported | [DATA_NEEDED: supported I/O standards] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Cyclone II |
| Number of Logic Elements | — | 4,608 LE |
| Package Type | — | 208-BFQFP (PQFP-208) |
| Bilangan Pin | — | 208 |
| Gambaran Suhu Operasi | — | 0°C to +85°C (32°F to 185°F) |
| Logic Family | — | CMOS |
| Terminal Form | — | Gull wing |
| Package Shape | — | Square |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Embedded Multiplier Count | — | [DATA_NEEDED: Embedded multiplier count] |
| Configuration Interface | — | [DATA_NEEDED: Configuration scheme support] |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: Fmax by speed grade] |
| Number of Logic Array Blocks | — | [DATA_NEEDED: LAB count] |
| Terminal Pitch | — | [DATA_NEEDED: Terminal pitch] |