EP2SGX130GF40C3ES vs EP2SGX130GF40C4NES Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2SGX130GF40C3ES disebabkan oleh Altera dan EP2SGX130GF40C4NES disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP2SGX130GF40C3ES - 130K LEs Stratix II GX FPGA 6.375Gbps | Altera
EP2SGX130GF40C3ES ObsoleteIntel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP2SGX130GF40C3ES | EP2SGX130GF40C4NES |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Family | Stratix II GX | Stratix II GX |
| Series | EP2SGX130 | — |
| Logic Elements | 132,540 | 132,540 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Logic Array Blocks (LABs) | 7,047 | — |
| Embedded Memory (TriMatrix) | 6,747 Kbits | — |
| DSP Blocks | Up to 17 | Yes (variable, see datasheet) |
| High-Speed Transceiver Channels | 4 to 20 (per device variant) | — |
| Transceiver Data Rate | Up to 6.375 Gbps | — |
| Global Clock Networks | Up to 16 | — |
| Regional Clock Networks | Up to 32 per device region | — |
| Internal Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Memory Controller Performance | Up to 550 MHz (DDR/DDR2) | — |
| DSP Multiplier Performance | Up to 450 MHz | — |
| Kemasan | FBGA-1508, 40 x 40 mm, 1.0 mm pitch (MS-034AAU-1) | — |
| Operating Temperature Grade | Commercial Extended (C3) | — |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| Status RoHS | Lead-Free (per package marking MS-034AAU-1) | — |
| Logic Blocks / ALMs | — | Approximately 53,000 ALMs |
| Core Voltage | — | 1.2 V |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Channels | — | Up to 20 (4 to 20, device-dependent) |
| User I/O Pins | — | 734 |
| Total Package Pins | — | 1508 (FC-FBGA ball grid) |
| Package Code | — | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Speed Grade | — | C4 (speed grade -4) |
| Internal Operating Frequency | — | Up to 717 MHz |
| Embedded Memory | — | Approximately 4.5 Mbits (TriMatrix) |
| PLL Blocks | — | 8 |
| Lead-Free / RoHS | — | Yes (LEAD FREE per datasheet family code) |
| Aras MSL | — | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| Suhu Operasi | — | Commercial Extended (per N suffix) |
| JEDEC Standard Reference | — | MS-034AAU-1 |