EP3SL200F1517I4L vs EP3SL200F1517I4LN Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP3SL200F1517I4L disebabkan oleh Altera dan EP3SL200F1517I4LN disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP3SL200F1517I4L - 200K LE Stratix III L FPGA, 1517-FCBGA | Altera
EP3SL200F1517I4L ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP3SL200F1517I4L | EP3SL200F1517I4LN |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | NRND |
| Logic Elements | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 8,000 | 8,000 |
| Embedded Memory (bits) | 10,901,504 | — |
| User I/Os | 976 | — |
| Number of Pins / Balls | 1517 | — |
| Kemasan | 1517-BBGA, FC-FBGA (Flip-Chip) | 1517-BBGA, FCBGA |
| Core Voltage | 0.9 V | — |
| Process Node | 65 nm CMOS | — |
| Speed Grade | I4 (industrial, speed grade 4) | — |
| Suhu Hubungan Operasi | -40C to +100C | — |
| Family | Stratix III L (logic-optimized) | Stratix III L |
| DSP Blocks / 18x18 Multipliers | 384 (18x18) | — |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (BGA) |
| Status RoHS | [DATA_NEEDED: per batch] | Compliant |
| Aras MSL | [DATA_NEEDED: per package datasheet] | [DATA_NEEDED: MSL moisture sensitivity level] |
| Embedded Memory Bits | — | 10,901,504 |
| User I/O Pins | — | 976 |
| Process Technology | — | 65 nm TSMC low-power |
| Suhu Operasi | — | -40C to +100C (Industrial) |
| Lead-Free | — | Yes |
| Supply Voltage Core | — | [DATA_NEEDED: VCC core voltage] |
| Transceiver Data Rate (max) | — | [DATA_NEEDED: max transceiver rate] |
| DSP Blocks (18x18 multipliers) | — | 384 |
| DSP Performance | — | 288 GMACS |
| Configuration Method | — | Passive Parallel / Active Serial / JTAG |
| Ball Pitch | — | 1.0 mm |
| Package Dimensions | — | 40 mm x 40 mm |