EP3SL200H780C3N vs EP3SL200H780C3 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP3SL200H780C3N disebabkan oleh Intel dan EP3SL200H780C3 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP3SL200H780C3N | EP3SL200H780C3 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | Stratix III L (low-power) | — |
| Process Node | 40 nm | — |
| Logic Elements | 200,000 | 200,000 |
| Embedded Memory Bits | 10,901,504 bits | 10,901,520 |
| Logic Array Blocks (LABs) | 8,000 | 8,000 |
| User I/Os | 488 | — |
| Kemasan | 780-Ball FCBGA (HBGA), 29 x 29 mm | 780-ball FCBGA (H780) |
| Jenis Pemasangan | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Clock Frequency | 800 MHz | — |
| Transceivers | 24 channels, up to 3.75 Gbps | [DATA_NEEDED: count and speed] |
| DSP Blocks | 384 | [DATA_NEEDED: count] |
| Speed Grade | C3 (commercial, -3 speed) | 3 (slowest of Stratix III bins) |
| Suhu Operasi | 0C to +85C (commercial) | Commercial grade (0C to +85C, exact range [DATA_NEEDED]) |
| Voltage - Core | 0.9 V / 1.0 V (core, VCC) | — |
| Voltage - I/O | 1.2 V to 3.3 V (VCCIO banks) | — |
| Aras MSL | 3 | 3 (168 Hours) |
| Lead-Free / RoHS | Yes | — |
| Mounting Pitch | 1.0 mm ball pitch | — |
| PLLs | 12 (Stratix III PLL array) | — |
| Configuration | JTAG IEEE Std 1149.1, passive/active serial | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Stratix III L |
| Device | — | EP3SL200 |
| User I/O Pins | — | 488 |
| Sub-Family | — | Stratix III L (lower-power logic variant) |
| Status RoHS | — | [DATA_NEEDED: confirmed in datasheet] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED] |