EP610PC-20 vs EP610PC-30 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610PC-20 disebabkan oleh Altera dan EP610PC-30 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610PC-20 EP610PC-30
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family Classic EPLD —
Logic Elements 16 macrocells —
Usable Gates 300 300
Propagation Delay (tPD) 20 ns 30 ns
Maximum Operating Frequency 100 MHz (pipelined) —
Supply Voltage (VCC) 5 V ±10% 5 V (4.75 V to 5.25 V)
Bilangan Pin 24 —
Kemasan PDIP-24 24-pin PDIP (0.300 inch)
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Process Technology CMOS EPROM CMOS EPROM
Programmable Flip-Flops 16 —
Input Pins 24 —
Output Pins 16 —
I/O Compatibility TTL —
Program/Erase Method UV (windowed) or OTP —
Status RoHS Non-compliant (legacy PDIP) Not applicable (legacy non-compliant package per distributor listing)
Device Family — Classic EPLD (EP610)
Macrocells — 16
Maximum Pipeline Frequency — 33.3 MHz (typical) / 100 MHz pipelined
Jenis Pemasangan — Through-Hole
Programmability — One-Time Programmable (OTP, no window on plastic PDIP)
Output Drive Current — [DATA_NEEDED: IOH/IOL per datasheet DC characteristics]
Input Pins (Dedicated) — [DATA_NEEDED: dedicated input count from datasheet pinout]
I/O Pins — [DATA_NEEDED: bidirectional I/O count from datasheet pinout]
Programming Tool — Altera A+PLUS / MAX+PLUS II (legacy)
Lead Free Status — Not applicable
Current Distributor — Rochester Electronics, LLC (authorized continuing source)

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