EP910IPC-12 vs EP910ILC-12 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910IPC-12 disebabkan oleh Altera dan EP910ILC-12 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910IPC-12 | EP910ILC-12 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | Classic EPLD | Altera EP910 Classic EPLD |
| Macrocells | 24 | — |
| Usable Gates | 450 | 450 (typical) |
| Maximum Operating Frequency (fMAX) | 76.9 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 12 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| Kemasan | 40-pin PDIP | 28-PLCC (J-Lead, 11.5 x 11.5 mm) |
| Jenis Pemasangan | Through Hole | Surface Mount |
| Technology | CMOS EPLD (UV-erasable or OTP) | — |
| Suhu Operasi | -40C to +85C (industrial) | -40 °C to +85 °C (industrial grade, 'I' suffix) |
| Programming Toolchain | MAX+PLUS II | — |
| Logic Capacity | Equivalent to ~24 PAL16V8s | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Number of Macrocells | — | 24 |
| Propagation Delay (tPD) | — | 12 ns (max) |
| Nominal Supply | — | 5 V |
| Memory Technology | — | UV-erasable CMOS EPROM |
| Configuration Storage | — | Non-volatile EPROM (instant-on) |
| Programming Method | — | Altera programming algorithm (serial/parallel master-slave) |
| Aras MSL | — | [DATA_NEEDED: MSL level] |
| Bilangan Pin | — | 28 |
| Feedback Paths | — | 16 dedicated |