EP910LC-25 vs EP910LC-30Y Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LC-25 disebabkan oleh Intel dan EP910LC-30Y disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910LC-25 | EP910LC-30Y |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | — |
| Dedicated Inputs | 16 | — |
| Kemasan | 28-pin PLCC (LC suffix) | PLCC-44 |
| Jenis Pemasangan | Surface Mount | Surface Mount (PLCC socket) |
| Technology | CMOS (EPROM-based) | — |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Suhu Operasi | 0C to +70C (commercial) | Commercial 0C to +70C |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| Tegangan Pemberi Arus | — | 5 V (TTL-compatible) |
| Process Technology | — | CMOS, UV-erasable / OTP |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |