EP910LI-12 vs EP910LI-20T Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LI-12 disebabkan oleh Altera dan EP910LI-20T disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910LI-12 | EP910LI-20T |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 12 ns | 20 ns |
| Maximum Frequency (fMAX) | 76.9 MHz | 95 MHz |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V typical) | 5 V |
| I/O Pins | 24 | 20 |
| Inputs (with input registers) | 36 | — |
| Kemasan | 28-PLCC (windowed ceramic, J-Lead) | CDIP-20 (ceramic DIP, through-hole) |
| Suhu Operasi | -40C to +85C (industrial) | -40 C to +85 C (industrial) |
| Process Technology | 1.0-micron CMOS EPROM | — |
| Power Dissipation (typical) | 200 mW at 5 V | — |
| Programming Method | UV-erasable via windowed package | — |
| Logic Compatibility | TTL-compatible I/O | — |
| Status RoHS | non_compliant (ceramic windowed package) | [DATA_NEEDED: RoHS status] |
| Family | — | Classic EPLD (Altera) |
| Logic Array Blocks (LABs) | — | 4 |
| Dedicated Inputs | — | 10 |
| Programming Technology | — | CMOS EPROM (UV-erasable) |
| Programming Voltage | — | 21 V |
| Speed Grade | — | -20 |
| Jenis Pemasangan | — | Through-hole |
| Aras MSL | — | [DATA_NEEDED: MSL level] |