EP910LI-40 vs EP910LI44 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LI-40 disebabkan oleh Altera dan EP910LI44 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910LI-40 EP910LI44
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Manufacturer Altera (now Intel PSG) —
Product Family Classic EPLD - EP910 series —
Device Type Erasable Programmable Logic Device (EPLD) —
Macrocells 24 24
Dedicated Inputs 12 12
I/O Pins 24 bidirectional —
Maximum Logic Inputs 36 36
Product Terms 240 —
Propagation Delay (tPD) 40 ns —
Technology Low-power CMOS (L-suffix) CMOS
Suhu Operasi -40C to +85C (industrial, I-suffix) —
Kemasan PLCC-44 (J-lead, windowed ceramic) —
Jenis Pemasangan Surface Mount (socket-compatible) Surface Mount (PLCC socket compatible)
Programmability UV-erasable, JEDEC-standard algorithm UV-erasable (windowed) or OTP
Status RoHS Non-compliant (windowed ceramic PLCC, legacy) non-compliant (original PLCC-44 lead finish)
Lifecycle Obsolete - replaced by MAX 7000 / MAX II CPLD family —
Family — Classic EPLD
Architecture — PAL-type, CMOS, One-Time-Programmable
Package Type — PLCC-44 (J-lead, surface mount)
Total Pins — 44
Bidirectional I/O — 24
Maximum Outputs — 24
Flip-Flops — 24
External Clocks — 2
Maximum Propagation Delay — [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns]
Supply Voltage (VCC) — 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial)
Operating Temperature (L grade) — -40 °C to +85 °C (industrial)
Programming Method — Altera Logic Programmer card / Data I/O / third-party EPROM programmers

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