EP910PI-25T vs EP910PI-12T Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PI-25T disebabkan oleh Altera dan EP910PI-12T disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910PI-25T | EP910PI-12T |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | Altera Classic EPLD Family | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Equivalent Gates | 900 (SSI/MSI equivalent) | — |
| Maximum Inputs | 36 | — |
| Maximum Outputs | 24 | — |
| Propagation Delay (tpd) | 25 ns | — |
| Supply Voltage (VCC) | 5 V | 5 V (4.75 V min, 5.25 V max) |
| Technology | CMOS, UV-erasable EPROM | — |
| Kemasan | 40-pin PDIP (600-mil) | 40-pin PDIP (Plastic DIP) |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Programming | UV-erasable | — |
| Jenis Pemasangan | Through-Hole (DIP) | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant (legacy PDIP package, contains lead) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Static Power | <100 mW (typical CMOS) | — |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| External Clock Inputs | — | 2 |
| Outputs | — | 24 |
| Terminals / Pin Count | — | 44 (PDIP-40 package pinout with NC pins) |
| Process Technology | — | CMOS |
| Programmable Technology | — | UV-erasable EPROM |
| Programming Interface | — | JEDEC-standard |
| Status Lingkungan Hidup | — | NRND / EOL (mature legacy product) |