EPC1441PI8N vs EPC144PI8 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC1441PI8N disebabkan oleh Altera dan EPC144PI8 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPC1441PI8N EPC1441PI8N - 440Kb OTP Config PROM, 8-PDIP | Altera / Intel

EPC1441PI8N - 440Kb OTP Config PROM, 8-PDIP | Altera / Intel

EPC1441PI8N ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPC1441PI8N EPC144PI8
Merek Altera Intel
Kategori Memory ICs FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli NRND
Jenis Ingatan OTP Configuration PROM (poly-fuse) OTP Serial Configuration EPROM (UV-erasable package option available)
Memory Capacity 440,800 bits (440 Kbit) —
Configuration Interface Altera Serial (PS) configuration —
Supply Voltage VCC 5.0 V nominal (4.75 V to 5.25 V) [DATA_NEEDED: VCC operating range]
Active Supply Current ICC [DATA_NEEDED: typical active ICC] —
Standby Supply Current ICCSTBY approximately 50 uA —
Programming Method Off-board PROM programmer (poly-fuse OTP) —
Configuration Time <100 ms typical for FLEX10KA loading —
Suhu Operasi -40C to +85C (industrial) -40C to +85C (industrial, 'I' suffix)
Kemasan 8-pin PDIP (Plastic DIP, through-hole) PDIP-8 (300 mil)
Kiraan Pin 8 8
Jenis Pemasangan Through-hole (THT) Through-hole (THT)
Lead-Free / RoHS Non-RoHS (legacy through-hole); check suffix for Pb-free option —
Compatible FPGA Families FLEX10K, FLEX10KA, FLEX6000, APEX20K series —
Family Position Top-of-family (largest density: 440Kb) —
Programming Voltage [DATA_NEEDED: VPP programming voltage] —
Endurance One-time programmable (no reprogram cycles) —
Memory Density — 144 Kbit (144,096 bits)
Antaramuka — 4-wire serial (DCLK, DATA, nCS, nINIT_STATUS)
Configuration Clock (max) — [DATA_NEEDED: DCLK maximum frequency]
Process Technology — CMOS EPROM (1.8 V core option per suffix '8')
Programmability — One-Time Programmable (OTP) per bitstream; UV-erasable window package variant also exists
Target FPGA Compatibility — Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX 20K (legacy)
Status RoHS — [DATA_NEEDED: RoHS compliance]
Lead-Free — [DATA_NEEDED: lead-free status]
Aras MSL — Not applicable (through-hole)
nINIT_STATUS Output — Open-drain, active-low (per datasheet family convention)
Power-On Reset — Internal automatic (per datasheet family convention)

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