EPC1L120 vs EPC1LC120 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC1L120 disebabkan oleh Intel dan EPC1LC120 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPC1L120 - Altera/Intel Configuration Device 120 kbit Serial | PLCC-20
EPC1L120 ⚠ Bahagian terakhir untuk beli
Pengandingan Spesifikasi
| Parametr | EPC1L120 | EPC1LC120 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Aktif |
| Jenis Ingatan | Configuration EEPROM | Serial Configuration Memory (Flash-based, non-volatile) |
| Memory Capacity | 120 kbit | — |
| Jenis Antaramuka | Serial (Altera configuration protocol) | — |
| Tegangan Pemberi Arus Operasi | 3.3 V / 5 V | — |
| Output Compatibility | MultiVolt: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V | — |
| Programmability | In-System via JTAG (IEEE 1149.1) | — |
| JTAG Support | Yes (dedicated JTAG port) | — |
| Kemasan | PLCC-20 | LQFP-120 (Low-profile Quad Flat Pack) |
| Jenis Pemasangan | Surface Mount / Through-Hole (socket) | Surface Mount |
| Reprogram Cycles | 100 cycles typical | — |
| Suhu Operasi | -40C to +85C (industrial) | — |
| Compatible Altera FPGAs | FLEX 6000, FLEX 8000, MAX 7000, MAX 9000 families | — |
| Cascade Support | Yes (multi-FPGA configuration chains) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Aras MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| Antaramuka | — | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Gambaran Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: VCC range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |