EPC4F324C8N vs EPC448PC-45A Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC4F324C8N disebabkan oleh Intel dan EPC448PC-45A disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPC448PC-45A - Altera Enhanced Configuration Device | PDIP
EPC448PC-45A ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPC4F324C8N | EPC448PC-45A |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Unknown | Masa Terakhir Dibeli |
| Manufacturer | Intel / Altera | — |
| Product Type | Enhanced configuration device | — |
| Target Device | SRAM-based LUT devices | — |
| MPN | EPC4F324C8N | — |
| Configuration Memory Capacity | [DATA_NEEDED: configuration memory capacity] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | Altera Passive Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF) |
| Maximum Configuration Frequency | [DATA_NEEDED: maximum configuration frequency] | — |
| Output Enable | [DATA_NEEDED: output enable function] | — |
| Programming Method | [DATA_NEEDED: programming method] | — |
| Kemasan | [DATA_NEEDED: package] | — |
| Kiraan Pin | [DATA_NEEDED: pin count] | 20 |
| Jenis Pemasangan | [DATA_NEEDED: mounting type] | Through-hole (DIP) |
| Suhu Operasi | [DATA_NEEDED: operating temperature] | -40 C to +85 C (industrial) |
| Storage Temperature | [DATA_NEEDED: storage temperature] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status from official datasheet] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Device Type | — | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs |
| Memory Density | — | 4 Mbit (448 Kbit) |
| Maximum Access Time | — | 45 ns |
| Speed Grade | — | -45A |
| Package Type | — | Plastic DIP (PDIP-20), 300-mil body |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage Compatibility | — | 1.8 V, 2.5 V, 3.3 V downstream FPGA |
| Programming Technology | — | EEPROM cell with internal charge pump |
| Configuration Support | — | Altera Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur FPGAs |
| Lead-Free | — | [DATA_NEEDED: lead-free finish status] |
| Aras MSL | — | Not applicable (through-hole package) |