EPC4Q100N vs EPC4QC1C00N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC4Q100N disebabkan oleh Intel dan EPC4QC1C00N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC4Q100N EPC4QC1C00N
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Jenis Ingatan Flash (NOR, Enhanced Configuration Device) —
Saiz Ingatan 4 Mbit (512 Kbyte) —
Configuration Interface Serial (FLEX) / Parallel / JTAG ISP —
Tegangan Pemberi Arus 3.3 V —
Program/Erase Cycles [DATA_NEEDED: minimum endurance in cycles] —
Kemasan 100-pin PQFP 100-pin PQFP (QFP-100)
Jenis Pemasangan Surface Mount —
Suhu Operasi -40 C to +85 C (industrial) -40 C to +85 C (industrial)
JTAG Support IEEE 1149.1 compliant —
In-System Programmable Yes —
Target FPGA Families Cyclone, Stratix, APEX, Mercury, ACEX Stratix, Cyclone, APEX, Mercury, ACEX
Data Width (parallel mode) 8-bit —
Lead-Free / RoHS [DATA_NEEDED: per lot] —
Status Not Recommended for New Designs (NRND) —
Configuration Schemes Active Serial (AS) / Active Parallel (AP) / Passive Serial (PS) —
Aras MSL [DATA_NEEDED: per JEDEC J-STD-020] 3 (per JEDEC J-STD-020)
Device Family — Enhanced Configuration Device (EPC4)
Memory Density — 4 Mbit (4,194,304 bits)
Supply Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
I/O Voltage Tolerance — 3.3 V / 5 V tolerant
Interface to FPGA — Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE
Configuration Data Width — 4-bit multiplexed on single DATA pin
In-System Programming — JTAG (IEEE 1149.1)
Programming Voltage — On-chip generated, no external VPP
Page Mode — Yes, multi-page storage supported
Configuration Clock (DCLK) — [DATA_NEEDED: DCLK max frequency]
Status RoHS — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]

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