EPM240GT100C4N vs EPM240GM100C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM240GT100C4N disebabkan oleh Intel dan EPM240GM100C5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ AktifPengandingan Spesifikasi
| Parametr | EPM240GT100C4N | EPM240GM100C5N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX II | MAX II G |
| Logic Elements | 240 | 240 (192 macrocells) |
| Macro Cells | 192 | — |
| Maximum User I/O | 80 | — |
| On-chip Flash Memory | 8 Kbits | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Maximum Operating Frequency | 247.5 MHz | — |
| Propagation Delay (tPD) | 6.1 ns | — |
| Speed Grade | C4 | — |
| Process Technology | 0.18 µm 6-layer metal flash | CMOS, Flash-based |
| Kemasan | TQFP-100 (16 × 16 mm, 0.5 mm pitch) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Jenis Pemasangan | Surface Mount | Surface Mount (BGA) |
| Programmability | JTAG (IEEE 1149.1) ISP | — |
| Status RoHS | Lead-Free / Compliant | — |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |
| Configuration Memory | — | Non-volatile Flash |
| Suhu Operasi | — | -40 C to +125 C |
| Lead Free / RoHS | — | Yes / Compliant |
| Aras MSL | — | 3 |