EPM3064ATC100-4N vs EPM3064ATC100-7 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATC100-4N disebabkan oleh Altera dan EPM3064ATC100-7 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM3064ATC100-7 - MAX 3000A 64-Macrocell CPLD, 7.5ns, 100-TQFP | Altera
EPM3064ATC100-7 ObsoletePengandingan Spesifikasi
| Parametr | EPM3064ATC100-4N | EPM3064ATC100-7 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | — |
| Usable Gates | 1,250 | 1,250 |
| User I/O Pins | 66 | — |
| Pin-to-Pin Delay (tPD) | 4.5 ns | — |
| Counter Frequency | 222.2 MHz (max) | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Kemasan | 100-pin TQFP | 100-pin TQFP |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | — |
| ISP Standard | IEEE Std. 1532 | — |
| Suhu Operasi | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Process Technology | CMOS EEPROM | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | — |
| Macrocells | — | 64 |
| Logic Array Blocks (LABs) | — | 2 |
| Maximum User I/Os | — | 66 (in 100-pin TQFP) |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.5 ns (-7 speed grade) |
| Maximum Internal Counter Frequency | — | 135.1 MHz |
| Supply Voltage - VCCINT (Core) | — | 3.3 V |
| Supply Voltage - VCCIO (I/O) | — | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| Technology | — | CMOS EEPROM |
| In-System Programming (ISP) | — | Yes, via IEEE 1149.1 JTAG |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 |
| JTAG Boundary Scan | — | Yes |
| Lead Free / RoHS | — | Compliant (modern shipments) |