EPM3064ATC44-7N vs EPM3064ATC44-10N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATC44-7N disebabkan oleh Altera dan EPM3064ATC44-10N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3064ATC44-7N EPM3064ATC44-10N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Aktif
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 64 64
Logic Array Blocks 2 —
Usable Gates 1,250 1250
User I/O Pins 34 34
Bilangan Pin 44 —
Speed Grade -7 (7.5 ns pin-to-pin delay) —
Pin-to-Pin Delay (tPD) 7.5 ns 10 ns
Maximum Counter Frequency 192.3 MHz (-7 grade) 192.3 MHz
Supply Voltage (VCC) 3.3 V —
MultiVolt I/O 1.8 V / 2.5 V / 3.3 V —
Programmability EEPROM, in-system programmable (ISP) —
JTAG Interface IEEE Std. 1149.1 compliant —
ISP Standard IEEE Std. 1532 compliant —
Boundary-Scan Test (BST) Built-in, JTAG-driven —
Kemasan 44-pin TQFP TQFP-44 (10x10 mm)
Suhu Operasi 0°C to +85°C (commercial) 0C to +70C (commercial)
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS Compliant Compliant
Logic Array Blocks (LABs) — 4
Supply Voltage (VCCINT) — 3.3 V
I/O Standard — MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V)
Configuration Memory — EEPROM (non-volatile)
In-System Programming — IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG) compliant
Pin-Locking — Yes (across design iterations)

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