EPM3064ATI44-4N vs EPM3064ATC44-4N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATI44-4N disebabkan oleh Altera dan EPM3064ATC44-4N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3064ATI44-4N EPM3064ATC44-4N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells 64 macrocells —
Usable Gates 1,250 gates 1,250
Number of Logic Array Blocks (LABs) 4 LABs (16 macrocells each) —
Maximum Operating Frequency 222.2 MHz —
Pin-to-Pin Propagation Delay (tPD) 4.5 ns (-4 speed grade) —
Supply Voltage - Core (VCCINT) 3.3 V —
Supply Voltage - I/O (VCCIO) 3.3 V or 2.5 V —
User I/O Pins 34 I/O —
Kemasan 44-pin TQFP 44-pin TQFP
Suhu Operasi -40C to +85C (industrial) 0C to +70C (commercial)
Programming Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP —
Configuration Memory EEPROM (non-volatile) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: rohs status] [DATA_NEEDED: rohs status]
Macro Cells — 64
Logic Array Blocks — 2
Number of I/Os — 34
Dedicated Inputs — 4
Propagation Delay (tpd) — 4.5 ns
Maximum Counter Frequency — 222.2 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V or 3.3 V
Programmability — EEPROM, in-system programmable (JTAG)
JTAG Support — IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP)

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