EPM3064ATI44-7 vs EPM3064ATI44-4N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATI44-7 disebabkan oleh Altera dan EPM3064ATI44-4N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3064ATI44-7 EPM3064ATI44-4N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 —
Usable Gates 1,250 1,250 gates
User I/O 34 —
Logic Array Blocks (LABs) 4 (16 macrocells each) —
Propagation Delay (tPD) 7.5 ns —
Maximum Internal Frequency (fMAX) 135.1 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V —
Supply Voltage (VCCIO) 3.0 V to 3.6 V —
Process Technology 0.30 µm CMOS EEPROM —
Suhu Operasi -40 °C to +85 °C (Industrial, 'I' suffix) -40C to +85C (industrial)
Kemasan 44-pin TQFP (TI44) 44-pin TQFP
Jenis Pemasangan Surface Mount Surface Mount
In-System Programmability Yes, IEEE Std. 1532 compliant —
JTAG Support Yes (IEEE 1149.1) —
PCI Compliance Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Aras MSL [DATA_NEEDED: MSL level] —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells — 64 macrocells
Number of Logic Array Blocks (LABs) — 4 LABs (16 macrocells each)
Maximum Operating Frequency — 222.2 MHz
Pin-to-Pin Propagation Delay (tPD) — 4.5 ns (-4 speed grade)
Supply Voltage - Core (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 3.3 V or 2.5 V
User I/O Pins — 34 I/O
Programming Interface — IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP
Configuration Memory — EEPROM (non-volatile)

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