EPM3128ATC144-7N vs EPM3128ATI144-5N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3128ATC144-7N disebabkan oleh Altera dan EPM3128ATI144-5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3128ATC144-7N EPM3128ATI144-5N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif NRND
Harga Unit (USD) $9.25 —
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) —
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 96
Kiraan Pin 144 —
Kemasan TQFP-144 (20 x 20 mm, 0.5 mm pitch) TQFP-144 (20x20 mm, 0.5 mm pitch)
Logic Family CMOS —
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) —
Counter Frequency Up to 227.3 MHz —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Suhu Operasi 0 °C to +70 °C (commercial) -40C to +85C (industrial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 —
Jenis Pemasangan Surface Mount (SMD/SMT) Surface Mount
Status RoHS Lead-free (-7N suffix indicates Pb-free finish) [DATA_NEEDED: RoHS status]
Family — MAX 3000A
Logic Gates — 2,500 gates
Macro Cells — 128
Maximum Operating Frequency — 192.3 MHz
Pin-to-Pin Propagation Delay (tPD) — 5.0 ns
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Standard — LVCMOS / LVTTL (5.0 V tolerant inputs)
Programming Interface — JTAG (IEEE 1149.1 BST) - in-system
Process Technology — 0.30 um CMOS EEPROM
Configuration Memory — Non-volatile on-chip EEPROM
Aras MSL — 3 (168 hours)
Lead-Free — [DATA_NEEDED: lead-free status]

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