EPM3512AFC256-10N vs EPM3512AFC256-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AFC256-10N disebabkan oleh Altera dan EPM3512AFC256-10 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3512AFC256-10N EPM3512AFC256-10
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family MAX 3000A MAX 3000A
Macrocells 512 512
Usable Gates 10000 10,000
User I/O Pins 208 —
Logic Array Blocks (LABs) [DATA_NEEDED: number of LABs] 16
Operating Frequency (fMAX) [DATA_NEEDED: fMAX MHz] —
Pin-to-Pin Delay (tPD) 10 ns 10 ns
Setup Time (tSU) 4.5 ns —
VCCINT (Core Supply) 3.3 V —
VCCIO (I/O Supply) 3.3 V or 2.5 V —
Technology CMOS EEPROM-based, non-volatile —
Operating Temperature (Commercial) 0 C to +70 C —
Kemasan 256-ball FBGA (17 mm x 17 mm) 256-pin FBGA
ISP Interface IEEE Std. 1149.1 JTAG, IEEE Std. 1532 —
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Aras MSL [DATA_NEEDED: MSL rating] —
Status RoHS [DATA_NEEDED: RoHS status] unknown
Maximum I/O Pins — 208
Maximum Counter Frequency — 87 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage Tolerance — 5-V tolerant
Programmable Technology — CMOS EEPROM
In-System Programmability — Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532)
Gambaran Suhu Operasi — [DATA_NEEDED: industrial/commercial operating temperature range]
Kiraan Pin — 256
Architecture — MAX (Multiple Array matriX) EEPROM-based

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga