EPM3512AFC256-20 vs EPM3512AFC256-10N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AFC256-20 disebabkan oleh Altera dan EPM3512AFC256-10N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3512AFC256-20 EPM3512AFC256-10N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 3000A MAX 3000A
Macrocells 512 512
Typical Usable Gates 10,000 —
Speed Grade -20 (20 ns tPD) —
Kemasan 256-ball FBGA (Fine-pitch BGA) 256-ball FBGA (17 mm x 17 mm)
Kiraan Pin 256 —
Operating Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) —
I/O Voltage (VCCIO) 2.5 V or 3.3 V (5.0 V tolerant inputs) —
I/O Standards LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (JTAG IEEE 1149.1) —
JTAG Support Yes (boundary-scan + ISP) —
Jenis Pemasangan Surface Mount Surface Mount (BGA)
Suhu Operasi [DATA_NEEDED: operating temperature range] —
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Aras MSL [DATA_NEEDED: MSL moisture sensitivity level] [DATA_NEEDED: MSL rating]
Configuration Memory Internal EEPROM —
Usable Gates — 10000
User I/O Pins — 208
Logic Array Blocks (LABs) — [DATA_NEEDED: number of LABs]
Operating Frequency (fMAX) — [DATA_NEEDED: fMAX MHz]
Pin-to-Pin Delay (tPD) — 10 ns
Setup Time (tSU) — 4.5 ns
VCCINT (Core Supply) — 3.3 V
VCCIO (I/O Supply) — 3.3 V or 2.5 V
Technology — CMOS EEPROM-based, non-volatile
Operating Temperature (Commercial) — 0 C to +70 C
ISP Interface — IEEE Std. 1149.1 JTAG, IEEE Std. 1532

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