EPM3512AQC208-10 vs EPM3512AQC208-15N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AQC208-10 disebabkan oleh Altera dan EPM3512AQC208-15N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM3512AQC208-15N EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM3512AQC208-10 EPM3512AQC208-15N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Family MAX 3000A MAX 3000A
Usable Gates 10,000 —
Macrocells 512 —
Logic Array Blocks (LABs) 32 16
User I/Os 208 —
Propagation Delay (tPD) 7.5 ns —
Maximum Frequency (fCNT) 116.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
In-System Programmability Yes (IEEE Std. 1532) Yes (IEEE Std. 1532 compliant)
JTAG Boundary Scan Yes (IEEE 1149.1) —
PCI Compliance PCI Local Bus Spec Rev. 2.2 (-10 speed grade) —
Kemasan 208-pin PQFP PQFP-208 (QC208)
Suhu Operasi 0C to +70 C (commercial) 0C to +70C (commercial)
Status RoHS [DATA_NEEDED: RoHS status not in verified data] [DATA_NEEDED: RoHS status]
Device Type — CPLD - Complex Programmable Logic Device
Macro Cells — 512
Maximum User I/O Pins — 172
Typical Usable Gates — 12,000
Number of Logic Elements — 512
Pin-to-Pin Delay (tPD) — 15 ns
Operating Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V (MultiVolt)
Programmable I/O Standards — LVTTL, LVCMOS, PCI (with external resistor)
JTAG Support — Yes (BST/Boundary-Scan Test)
Jenis Pemasangan — Surface Mount

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