EPM3512AQC208-2 vs EPM3512AQC208-3 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AQC208-2 disebabkan oleh Altera dan EPM3512AQC208-3 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM3512AQC208-3 EPM3512AQC208-3 - MAX 3000A CPLD, 512 Macrocells, 172 I/O, PQFP-208 | Altera

EPM3512AQC208-3 - MAX 3000A CPLD, 512 Macrocells, 172 I/O, PQFP-208 | Altera

EPM3512AQC208-3 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM3512AQC208-2 EPM3512AQC208-3
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Family MAX 3000A MAX 3000A
Macrocells 512 512
User I/O Pins 172 —
Logic Array Blocks (LABs) 16 16 (32 macrocells each)
Speed Grade -2 -3
Kemasan PQFP-208 (QC) PQFP-208
Supply Voltage (Core) 3.3 V —
Output Drive Voltage 2.5 V / 3.3 V programmable —
Input Voltage Tolerance 2.5 V / 3.3 V / 5.0 V —
Process Technology 0.30 µm EEPROM —
Program/Erase Endurance 100 cycles (typical) —
In-System Programmability Yes (IEEE 1149.1 JTAG) Yes (IEEE Std. 1532 compliant)
User I/O Banks 4 —
Gambaran Suhu Operasi Commercial (0C to +70C) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from datasheet]
Lead-Free No (SnPb lead finish) —
Security Bit Yes (programmable) —
Device Type — CPLD (Complex Programmable Logic Device)
Maximum User I/O Pins — 172
Supply Voltage - Core (VCCINT) — 3.3 V
I/O Bank Supply Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V (multiVolt)
Boundary-Scan Test — Yes (IEEE Std. 1149.1 / JTAG)
Program/Erase Cycles — 100 minimum [DATA_NEEDED: exact datasheet figure]
Non-Volatile Configuration — Yes (EEPROM-based)
Suhu Operasi — [DATA_NEEDED: industrial/commercial grade range]
Aras MSL — [DATA_NEEDED: moisture sensitivity level]

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga