EPM5016LC-17 vs EPM5016DI-20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5016LC-17 disebabkan oleh Altera dan EPM5016DI-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5016LC-17 | EPM5016DI-20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 EPLD | MAX 5000 |
| Technology | CMOS, UV-erasable | CMOS EPROM |
| Macrocells | 16 | 16 |
| Product Terms | 160 | — |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 8 | — |
| Total Input Pins | 16 | — |
| Outputs | 8 | — |
| External Clock Inputs | 1 | 1 |
| Propagation Delay (tPD) | 17 ns | 20 ns |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Kemasan | Windowed Ceramic DIP (LC) | 20-pin Ceramic DIP (DI), windowed |
| Tegangan Pemberi Arus | [DATA_NEEDED: VCC range] | [DATA_NEEDED: VCC nominal] |
| Suhu Operasi | [DATA_NEEDED: temperature grade] | [DATA_NEEDED: operating temperature range] |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Logic Compatibility | TTL/CMOS | — |
| Device Type | — | EPLD (UV-erasable CMOS) |
| Frekuensi Klock Maksimum | — | 62.5 MHz |
| Total Inputs | — | 16 |
| Configurable I/O Pins | — | 8 |
| Product Terms per Output | — | 8 |
| Output Functions per Macrocell | — | 8 |
| Programmable Interconnect | — | PIA (Programmable Interconnect Array) |
| Speed Grade | — | -20 (20 ns tPD) |