EPM5032JC-20 vs EPM5032DC-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5032JC-20 disebabkan oleh Altera dan EPM5032DC-20 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5032JC-20 EPM5032DC-20
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type UV-erasable Programmable Logic Device (PLD) —
Family MAX 5000 —
Macrocells 32 32
Logic Array Blocks (LABs) 1 —
Product Terms (P-terms) 320 —
Propagation Delay (tPD) 20 ns —
Frekuensi Klock Maksimum 62.5 MHz —
Setup Time 10 ns —
I/O Lines 16 (bidirectional) —
Dedicated Inputs 8 —
Total Inputs 24 —
Kemasan 68-pin JLCC (windowed ceramic) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Process Technology CMOS —
Erase Method UV (12V VPP + ultraviolet exposure) —
Programming Voltage (VPP) 12 V —
Architecture PAL-type AND-OR array with PIA interconnect —
Status Lingkungan Hidup Obsolete (legacy Altera MAX 5000) —
Product Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Programmable Technology — UV-Erasable / OTP EPROM
Usable Gates — 600
Maximum Frequency (fCNT) — 71.4 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Supply Voltage (VCC) — 5 V
Jenis Pemasangan — Through-Hole
Logic Blocks — 4 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: I/O pin count for DIP-20 variant]
Suhu Operasi — [DATA_NEEDED: commercial/industrial/military grade]
Status RoHS — Compliant (per IC-Components listing)
Lead Free — [DATA_NEEDED: confirmed lead-free]
Manufacturer — Altera (now Intel Programmable Solutions Group)
Programming Method — Altera MAX+PLUS II / Quartus (legacy support)

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga