EPM5064JC vs EPM5064LC-1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064JC disebabkan oleh Altera dan EPM5064LC-1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5064JC | EPM5064LC-1 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable PLD) | — |
| Macrocells | 64 | 64 |
| Usable Gates | 1,250 (approx.) | 1.25K (approx.) |
| Logic Array Inputs | 36 | — |
| Logic Array Outputs | 64 | — |
| Kemasan | 68-pin PLCC (JEDEC) | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| Jenis Pemasangan | Surface Mount (socketed) | — |
| Supply Voltage (VCC) | 5 V (typical, 4.75 V - 5.25 V range) | 4.75 V to 5.25 V |
| I/O Logic Level | TTL / CMOS compatible | — |
| Configuration Memory | EPROM (UV-erasable window or OTP) | — |
| Suhu Operasi | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Pin-to-Pin Delay (tPD) | [DATA_NEEDED: specific tPD grade value] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fCNT grade value] | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Aras MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera MAX+PLUS II / Quartus II (legacy device support) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 4 |
| Internal Operating Frequency | — | 62.5 MHz |
| Propagation Delay (tPD) | — | 40 ns |
| Input Lines | — | 36 |
| Dedicated Inputs | — | 7 |
| Output Lines | — | 28 |
| Programming Technology | — | OTP / UV-Erasable EPROM |
| Process Technology | — | CMOS |
| Programming Interface | — | JTAG (ByteBlaster-compatible) |