EPM5192GC-1 vs EPM5192GI84 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GC-1 disebabkan oleh Altera dan EPM5192GI84 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192GC-1 EPM5192GI84
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 (Classic) MAX 5000
Logic Type CPLD (Complex Programmable Logic Device) —
Macrocells 192 192
Usable Gates 3,750 —
Logic Array Blocks (LABs) 12 —
Dedicated Inputs 7 —
User I/O Pins 64 —
Maximum Propagation Delay (tPD) 40 ns —
Maximum Frequency (fMAX) 62.5 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Process Technology CMOS, UV-erasable / OTP —
Kemasan 100-pin Ceramic PGA (GC) 84-pin PGA (WPGA, square, through-hole, pin/peg terminals)
Jenis Pemasangan Through-Hole (PGA) Through-Hole (PGA socket or PCB pin/peg)
Configuration Method UV-Erase / One-Time Programmable —
Interconnect Peripheral Interconnect Array (PIA) —
Suhu Operasi [DATA_NEEDED: operating temperature grade] —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: most legacy PGA parts are non-RoHS]
Device Type — UV-Erasable / OTP Complex PLD (CPLD)
Logic Array Blocks — [DATA_NEEDED: number of LABs]
Package Code — WPGA
Operating Voltage (VCC) — 5 V (typical)
I/O Logic Compatibility — TTL
Temperature Grade — Industrial
Programmable Flip-Flop Modes — D, T, JK, SR
Programmability — UV-erasable (windowed) / OTP
Programming File Format — JEDEC map via MAX+PLUS II / A+PLUS
Propagation Delay — [DATA_NEEDED: tPD in ns]
Max User I/O Pins — [DATA_NEEDED: usable I/O count for this package]
Gambaran Suhu Operasi — -40 C to +85 C (industrial)
Lead-Free — [DATA_NEEDED: legacy part, likely contains lead]
Number of Terminals — 84
Terminal Form — PIN/PEG
Package Shape — SQUARE

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