EPM5192GI84 vs EPM5192GC-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GI84 disebabkan oleh Altera dan EPM5192GC-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192GI84 EPM5192GC-2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Macrocells 192 192
Logic Array Blocks [DATA_NEEDED: number of LABs] 16 (LABs of 16 macrocells each)
Kemasan 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) —
Package Code WPGA —
Operating Voltage (VCC) 5 V (typical) —
I/O Logic Compatibility TTL —
Temperature Grade Industrial —
Programmable Flip-Flop Modes D, T, JK, SR —
Programmability UV-erasable (windowed) / OTP —
Programming File Format JEDEC map via MAX+PLUS II / A+PLUS —
Propagation Delay [DATA_NEEDED: tPD in ns] —
Max User I/O Pins [DATA_NEEDED: usable I/O count for this package] —
Gambaran Suhu Operasi -40 C to +85 C (industrial) —
Jenis Pemasangan Through-Hole (PGA socket or PCB pin/peg) Through-hole (PGA socket)
Status RoHS [DATA_NEEDED: most legacy PGA parts are non-RoHS] Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing)
Lead-Free [DATA_NEEDED: legacy part, likely contains lead] —
Number of Terminals 84 —
Terminal Form PIN/PEG —
Package Shape SQUARE —
Usable I/O Pins — [DATA_NEEDED: exact user I/O count for PGA package]
Propagation Delay (tPD) — 12 ns typical (-2 grade)
Counter Frequency — 100 MHz minimum
Supply Voltage (VCC) — 5 V nominal
Technology — CMOS EPROM
Programmable Technology — UV-erasable / one-time programmable
Programming Toolchain — Altera MAX+PLUS II
Package Type — Pin Grid Array (PGA), ceramic
Suhu Operasi — Commercial (0C to +70C)
Speed Grade — -2

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