EPM5192GM vs EPM5192GC84-1 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GM disebabkan oleh Altera dan EPM5192GC84-1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192GM EPM5192GC84-1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Family MAX 5000 —
Device Type UV Erasable Programmable Logic Device (PLD) —
Technology CMOS CMOS (EPROM-cell based)
Number of Macrocells 192 —
Usable Gates 3,750 —
Pin-to-Pin Delay (tPD) 15 ns (fastest speed grade); 55 ns (this part) —
Counter Frequency (fCNT) up to 76.9 MHz —
Propagation Delay (tPD, this part) 55 ns —
Kemasan CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed) 84-pin PGA (Pin Grid Array), WPGA code
Jenis Pemasangan Through-Hole (PGA) Through-hole (PGA socket)
Erasure Method UV (windowed ceramic package) —
Tegangan Pemberi Arus [DATA_NEEDED: typical VCC range] —
Maximum User I/O [DATA_NEEDED: exact I/O count for CPGA-84] —
Suhu Operasi [DATA_NEEDED: commercial/industrial/military grade] —
Status RoHS Non-compliant (contains lead in ceramic PGA) Compliant (per third-party distributor listing)
Process Node [DATA_NEEDED: CMOS process geometry] —
Programming Interface JTAG-compatible (per MAX 5000 family) —
Family — MAX 5000
Product Type — UV-Erasable/OTP Complex PLD (CPLD)
Macrocells — 192
Propagation Delay (tPD) — 40 ns (speed grade -1)
Frekuensi Klock Maksimum — 50 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V
Dedicated Inputs — 7
User I/O Pins — 64
Total Inputs / Outputs — 72 inputs / 64 outputs
Architecture — Shared input/clock and shared product terms
Temperature Grade — Commercial
Programming Method — UV erasure (quartz window) + EPROM programmer
Logic Element Type — Macrocells with AND/OR array

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