EPM7128AETC144-7N vs EPM7128AETC144-7 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128AETC144-7N disebabkan oleh Altera dan EPM7128AETC144-7 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM7128AETC144-7N EPM7128AETC144-7
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Obsolete
Family MAX 7000A —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Gates 2500 (2.5K gates) —
Macro Cells 128 —
User I/Os 36 (in 144-pin TQFP) —
Maximum Operating Frequency 129.9 MHz 129.9 MHz
Pin-to-Pin Delay 7.5 ns —
Propagation Delay (tpd) 7.5 ns —
Supply Voltage (VCCINT) 3.3 V 3.0 V to 3.6 V
Process Technology CMOS, EEPROM-based CMOS
Programmability In-System Programmable (ISP) via JTAG —
Boundary-Scan Test IEEE Std 1149.1 (JTAG) —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (Commercial)
Kemasan 144-pin TQFP 144-pin TQFP (20x20 mm)
Jenis Pemasangan Surface Mount Surface Mount
Pin-Compatible With MAX 7000S 5.0V family (144-pin TQFP) —
Status RoHS Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes —
Series — MAX 7000A
Programmable Type — In-System Programmable (ISP), EEPROM
Number of Macrocells — 128
Number of Logic Array Blocks (LABs) — 8
Number of Usable Gates — 2,500
Number of I/Os — 100
Propagation Delay (tPD) Max — 7.5 ns
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V tolerant
Programming Interface — IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster)
Configuration Memory — EEPROM, non-volatile
ISP Endurance — 100 cycles typical per macrocell

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