EPM7128ATC144-10 vs EPM7128AETC144-7 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128ATC144-10 disebabkan oleh Altera dan EPM7128AETC144-7 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM7128ATC144-10 EPM7128AETC144-7
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Manufacturer Altera (now Intel) —
Series MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) —
Programmable Type EE PLD (EEPROM-based, in-system programmable) In-System Programmable (ISP), EEPROM
Macrocells 128 —
Logic Array Blocks 4 —
User I/O Pins 68 —
Propagation Delay (tPD) 10 ns —
Maximum Counter Frequency 98 MHz —
Supply Voltage - Internal (VCCINT) 3.0 V to 3.6 V —
I/O Voltage Levels 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) —
In-System Programmability Yes (IEEE Std 1149.1 JTAG) —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (Commercial)
Kemasan / Case 144-TQFP (20 x 20 mm) —
Jenis Pemasangan Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 2nd generation —
Status RoHS unknown (legacy Altera device) [DATA_NEEDED: RoHS status]
Number of Macrocells — 128
Number of Logic Array Blocks (LABs) — 8
Number of Usable Gates — 2,500
Number of I/Os — 100
Propagation Delay (tPD) Max — 7.5 ns
Maximum Operating Frequency — 129.9 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V tolerant
Kemasan — 144-pin TQFP (20x20 mm)
Programming Interface — IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster)
Configuration Memory — EEPROM, non-volatile
ISP Endurance — 100 cycles typical per macrocell
Process Technology — CMOS

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