EPM7128BTC144-7 vs EPM570T144C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128BTC144-7 disebabkan oleh Altera dan EPM570T144C5N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM7128BTC144-7 | EPM570T144C5N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Aktif |
| Family | MAX 7000B | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 100 (per 144-pin TQFP package) | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Counter Frequency (fCNT) | 126.6 MHz | — |
| Maximum Operating Frequency | 175 MHz (family typical) | — |
| Supply Voltage (VCCINT) | 2.5 V | — |
| I/O Bank Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multiVolt) | — |
| Configuration Memory | EEPROM (non-volatile, ISP) | — |
| Programmability | IEEE 1149.1 JTAG (ISP) | — |
| Operating Temperature (Commercial) | 0C to +90C | — |
| Kemasan | 144-pin TQFP | TQFP-144 (20 × 20 mm, 0.5 mm pitch) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | Yes |
| Series | — | MAX II Device |
| Logic Elements (LEs) | — | 570 |
| Macrocells | — | 440 |
| User I/Os | — | 116 |
| Internal User Flash Memory | — | 8 Kbit |
| Global Clocks | — | 4 |
| Process Technology | — | 0.18 µm 6-layer-metal flash |
| Core Voltage (VCCINT) | — | 1.8 V (typical, internally regulated) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) |
| Maximum User I/O Pins | — | 116 |
| Propagation Delay (tPD) | — | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| Suhu Operasi | — | 0 °C to +85 °C (commercial, C5 grade) |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system programmable) |
| Configuration Storage | — | On-chip non-volatile flash |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) |
| Aras MSL | — | 3 (per JEDEC J-STD-020) |
| Design Software | — | Intel Quartus II (MAX II device support) |