EPM7128SQC100-7F vs EPM7128SQC100-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128SQC100-7F disebabkan oleh Altera dan EPM7128SQC100-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM7128SQC100-15 EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel

EPM7128SQC100-15 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM7128SQC100-7F EPM7128SQC100-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Harga Unit (USD) — $8.20
Family MAX 7000S MAX 7000
Logic Elements / Blocks 8 LABs —
Number of Macrocells 128 —
Number of Usable Gates 2,500 —
Maximum Operating Frequency 125 MHz —
Pin-to-Pin Delay (tPD) 7.5 ns 15 ns
Number of User I/O 84 —
Supply Voltage (VCCINT) 4.75 V to 5.25 V (5 V nominal) 5 V (5% tolerance)
Programmable Type In-System Programmable (ISP), EEPROM —
JTAG Boundary-Scan Yes (IEEE 1149.1 BST) —
Open-Drain Output Option Yes —
Suhu Operasi 0 °C to 70 °C (Commercial) 0C to +70C (Commercial)
Kemasan 100-pin PQFP (SQC100), surface-mount 100-pin PQFP (Plastic Quad Flat Pack)
Jenis Pemasangan Surface Mount Surface Mount
Lead-Free (Pb-Free) Yes (matte-tin, '-F' suffix) —
Status RoHS [DATA_NEEDED: confirmed from manufacturer] Non-compliant (SnPb lead finish - legacy PQFP)
Jenis Ingatan Non-volatile (EEPROM configuration) —
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 128
Logic Array Blocks (LABs) — 4 (16 macrocells each)
User I/Os — 84
Maximum Frequency (fMAX) — [DATA_NEEDED: fMAX value]
Typical Gate Count — 2,500 gates
Programming Technology — EEPROM (in-system programmable via JTAG)
JTAG Interface — IEEE Std. 1149.1 compliant
Aras MSL — 3 (168 hours)

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