EPM7256AETI100-7N vs EPM7128AETI100-7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7256AETI100-7N disebabkan oleh Intel dan EPM7128AETI100-7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM7256AETI100-7N - 256-MacroCell MAX 7000A CPLD, 100TQFP | Intel
EPM7256AETI100-7N ⚠ Bahagian terakhir untuk beliAltera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N ObsoletePengandingan Spesifikasi
| Parametr | EPM7256AETI100-7N | EPM7128AETI100-7N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Family | MAX 7000A | MAX 7000A CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 256 | — |
| Usable Gates | 5,000 | — |
| Maximum User I/O | 84 | — |
| Logic Elements / Blocks | 16 Logic Array Blocks | — |
| Maximum Operating Frequency | 126.6 MHz | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V | — |
| Technology | CMOS, EEPROM-based configuration | — |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | — |
| Kemasan | 100-pin TQFP (TQ100, 14x14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Suhu Operasi | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| Aras MSL | 3 (168 hours) | — |
| Status RoHS | Compliant | Compliant |
| Series | — | MAX 7000A |
| Macro Cells | — | 128 |
| Number of Usable Gates | — | 2,500 |
| Number of I/O | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD max) | — | 7 ns |
| Maximum Operating Frequency (fCNT) | — | 129.9 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Bank Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |