EPM7256AETI100-7N vs EPM7128AETI100-7N 比較
詳細並排比較 EPM7256AETI100-7N 由 Intel 與 EPM7128AETI100-7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N Obsolete規格比較
| 參數 | EPM7256AETI100-7N | EPM7128AETI100-7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | MAX 7000A | MAX 7000A CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 256 | — |
| Usable Gates | 5,000 | — |
| Maximum User I/O | 84 | — |
| Logic Elements / Blocks | 16 Logic Array Blocks | — |
| Maximum Operating Frequency | 126.6 MHz | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V | — |
| Technology | CMOS, EEPROM-based configuration | — |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | — |
| 封裝 | 100-pin TQFP (TQ100, 14x14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| MSL 等級 | 3 (168 hours) | — |
| RoHS 狀態 | Compliant | Compliant |
| Series | — | MAX 7000A |
| Macro Cells | — | 128 |
| Number of Usable Gates | — | 2,500 |
| Number of I/O | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD max) | — | 7 ns |
| Maximum Operating Frequency (fCNT) | — | 129.9 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Bank Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |