EPM9320LC84-15 vs EPM9400LC84-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320LC84-15 disebabkan oleh Intel dan EPM9400LC84-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9320LC84-15 EPM9400LC84-15
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 MAX 9000
Series EPM9320 —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 —
Usable Gates 6,000 8,000
Logic Array Blocks (LABs) 20 —
Propagation Delay (tPD) 15 ns (max) —
Frekuensi Klock Maksimum 117.6 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) —
Programmability 5.0 V in-system programmable (ISP) via JTAG —
JTAG Interface IEEE Std. 1149.1 boundary-scan compliant IEEE Std. 1149.1 compliant (ISP)
Kemasan 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC
Jenis Pemasangan Surface Mount Surface Mount
Suhu Operasi -40C to +85C (commercial) [DATA_NEEDED: exact grade] 0C to +70C (Commercial)
Technology CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX) —
Built-in Pull-up Resistors Yes, on every I/O pin —
Architecture Feature Pin-locking across design iterations —
Status RoHS [DATA_NEEDED: confirm from manufacturer] [DATA_NEEDED: RoHS status]
Macro Cells — 400
Logic Array Blocks — 25
Maximum User I/Os — 59
Maximum Operating Frequency — 117.6 MHz
Speed Grade — -15 (15 ns pin-to-pin delay)
Core Supply Voltage (VCCINT) — 5.0 V
Input Logic Compatibility — TTL, 3.3 V and 5.0 V tolerant
Configuration Memory — EEPROM (non-volatile, in-system programmable)
Minimum VCCINT — 4.75 V
Programming Method — In-System Programmable via JTAG

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